C-PHY: How do you encode binary data on three lines?

When we talk about digital information we usually think of binary data, which is composed of a sequence of ones and zeroes. Binary data only needs a single line, or wire, referenced to ground in the case of single ended signaling and two lines in the case of differential signaling. C-PHY is a physical layer transport that uses three lines to encode binary information adopted by the MIPI Alliance in October of 2014. Prior to C-PHY, there was no well-known coding scheme for encoding binary data on three lines. I began researching C-PHY last year after being tasked with the creation of C-PHY transmitter test automation software.  When I first read the C-PHY specification, and the encoding mechanism for for C-PHY data, it was hard to understand. I decided to wait a week and then reread the specification. My second reading was a completely different experience in regards to comprehending how binary data is encoded on three lines.  Keep in mind, I don’t expect everyone to understand C-PHY’s encoding after reading the specification or this blog. What I do hope is an interested reader can review this blog and be better prepared to understand the intricacies of the C-PHY specification.

The most important concept to understand about C-PHY’s coding is the fact that the information isn’t held in the actual voltage state of the three lines but in the transition from one voltage state to the next. One might think that three lines tied together would be like three single-ended signals that could be tied together for 3 bits of information on every edge. The primary issue with this solution is that there is no way to recover a clock reliably. The first step to solving this problem is to limit the possible voltage states from 8 (2^3) to 6, throwing out the cases where all three lines have the same voltage (111 or 000). This is done to ensure that at least two lines have opposite voltage during every transition. The next step is to force a voltage state change at every transition. By doing so, it is guaranteed that a clock can be recovered, regardless of what data is being sent. Effectively, there are 6 valid state transitions at any given symbol, one of which is the transition signifying that the same symbol is being sent again.

Without going into the gritty details of which voltage state transitions are assigned where, it can be understood that every symbol sent transmits 2.32 bits (log2(5 possible transitions)) of information across 3 lines per symbol (0.77 bits per symbol per line). The effective per line throughput is higher when compared to typical differential signaling, which sends 1 bit of information per 2 lines per symbol (0.5 bits per symbol per line).  Differential signaling also typically sees a 20% clock recovery overhead in the form of 8b10b encoding or a dedicated clock lane per 4 data lanes which reduces the per line throughput to 0.4.. However, there is one issue: Although there are 5 possible transitions at any voltage state, log2(5) (2.32) bits per symbol is not an integer number of bits.  A binary source cannot encode part of a bit so blocks of bits are mapped to blocks of symbols. In order to make use of that 5th possible transition and send more than 2 bits of information per symbol, 16-bit words are encoded to blocks 7 symbols long. This is done by making a translation table of bit patterns to symbol sequences; 216 (65,536) possible bit patterns are mapped to 57 (78,125) symbol patterns.

The primary motivation for the creation of C-PHY is to increase the throughput of the physical layer on mobile devices without increasing the number of lines or increasing the symbol rate. Both increasing the line count and the symbol rate require more power and cost more for the manufacturer. C-PHY has the added benefit of allowing designers to recycle D-PHY physical layer designs with relatively few changes, keeping the cost of design down.

Hopefully, this blog has helped explain how C-PHY uses three lines to encode binary information. C-PHY is an excellent example of how open-minded approaches can lead to clever solutions and how learning about innovative technologies can inspire future clever solutions.

Learn more about the IOL Mobile C-PHY testing options here.