The IEEE 802.11 family of wireless LAN protocols defines multiple physical layers implementations of which direct sequence spread spectrum (DSSS, 802.11b) and orthogonal frequency division multiplexing (OFDM, 802.11a/g) are currently the most popular. Market pressures are forcing the convergence of multiple wireless protocols into the same access device, and shortened product design cycles dictate rapid prototyping of new or enhanced protocols. The computationally intensive signal processing algorithms and high data rates associated with these protocols necessitate dedicated hardware implementation of some portions of the signal processing chain, yet allocating separate hardware resources for each of the standards would make the "universal access device" bulky and inefficient. Re-using the same software-reconfigurable hardware to handle different processing algorithms would enable an efficient, flexible alternative to current prototyping and implementation methods. In this thesis, the feasibility of using Software Defined Radio architectures as a prototyping tool for wireless LAN baseband signal processor implementations is explored. Signal processing architectures and algorithms for DSSS and OFDM protocols were developed in the Simulink and Matlab environments, and were then translated to VHDL hardware descriptions. A reference design for a OFDM transmitter was synthesized for implementation on a Xilinx Virtex II FPGA, and functional and timing simulations verified the design correctness.